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ICS525-01/02 OSCaRTM User Configurable Clock
Description
The ICS525-01 and ICS525-02 OSCaRTM are the most flexible way to generate a high quality, high accuracy, high frequency clock output from an inexpensive crystal or clock input. The name OSCaR stands for OSCillator Replacement, as they are designed to replace crystal oscillators in almost any electronic system. The user can easily configure the device to produce nearly any output frequency from any input frequency by grounding or floating the select pins. Neither microcontroller nor software nor device programmer are needed to set the frequency. Using Phase-Locked-Loop (PLL) techniques, the device accepts a standard fundamental mode, inexpensive crystal to produce output clocks up to 250 MHz. It can also produce a highly accurate output clock from a given input clock, keeping them frequency locked together. For similar capability with a serial interface, use the ICS307. For simple multipliers to produce common frequencies, refer to the LOCO family of parts, which are smaller and more cost effective.
Features
* Packaged as 28 pin SSOP (150 mil body) * ICS525-01 with output frequencies up to 160 MHz * ICS525-02 with output frequencies up to 250 MHz * User determines the output frequency by setting all internal dividers * Eliminates need for custom oscillators * No software needed * Online ICS525 calculator at www.icst.com/products/ics525inputForm.html * Pull-ups on all select inputs * Input crystal frequency of 5 - 27 MHz * Input clock frequency of 2 - 50 MHz * Very low jitter * Duty cycle of 45/55 up to 200 MHz * Operating voltages of 3.0 to 5.5V * Ideal for oscillator replacement * Industrial temperature versions available * For Zero Delay, refer to the ICS527 GND S2:S0 3 Reference Divider Phase Comparator, Charge Pump, and Loop Filter VCO Divider Crystal Oscillator VCO Output Divider
Block Diagram
VDD 2
2
PD Crystal or clock input
X1/ICLK
Output Buffer Output Buffer
CLK
REF
X2
7 R6:R0
9
optional
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V8:V0
1 Revision 071100 Printed 11/13/00 Integrated Circuit Systems, Inc. * 525 Race Street *San Jose* CA * 95126*(408) 295-9800tel* www.icst.com
ICS525-01/02 OSCaRTM User Configurable Clock
Pin Assignments
R5 R6 S0 S1 S2 VDD X1/ICLK X2 GND V0 V1 V2 V3 V4
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
R4 R3 R2 R1 R0 VDD REF CLK GND PD V8 V7 V6 V5
R5 R6 S0 S1 S2 VDD X1/ICLK X2 GND V0 V1 V2 V3 V4
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
R4 R3 R2 R1 R0 VDD REF CLK GND PDTS V8 V7 V6 V5
ICS525-01
ICS525-02
ICS525-01 Pin Descriptions
Pin # Name Type Description
I(PU) I(PU) P X1 X2 P I(PU) I(PU) O O Reference divider word input pins determined by user. Forms a binary number from 0 to 127. Select pins for output divider determined by user. See table on page 3. Connect to VDD. Crystal connection. Connect to a parallel resonant fundamental crystal, or input clock. Crystal connection. Connect to a crystal, or leave unconnected for clock. Connect to ground. VCO divider word input pins determined by user. Forms a binary number from 0 to 511. Power Down. Active low. Turns off entire chip when low. Clock outputs stop low. Output Clock determined by status of R0-R6, V0-V8, S0-S2 and input frequency. Reference output. Buffered crystal oscillator (or clock) output. 1, 2, 24-28 R5, R6, R0-R4 3, 4, 5 S0, S1, S2 6, 23 VDD 7 X1/ICLK 8 X2 9, 20 GND 10-18 V0-V8 19 PD 21 CLK 22 REF
ICS525-02 Pin Descriptions
Pin # Name Type Description
I(PU) I(PU) P X1 X2 P I(PU) I(PU) O O Reference divider word input pins determined by user. Forms a binary number from 0 to 127. Select pins for output divider determined by user. See table on page 3. Connect to VDD. Crystal connection. Connect to a parallel resonant fundamental crystal, or input clock. Crystal connection. Connect to a crystal, or leave unconnected for clock. Connect to ground. VCO divider word input pins determined by user. Forms a binary number from 0 to 511. Power Down and Tri-state. Active low. Turns off entire chip and tri-states the outputs when low. Output Clock determined by status of R0-R6, V0-V8, S0-S2 and input frequency. Reference output. Buffered crystal oscillator (or clock) output. 1, 2, 24-28 R5, R6, R0-R4 3, 4, 5 S0, S1, S2 6, 23 VDD 7 X1/ICLK 8 X2 9, 20 GND 10-18 V0-V8 19 PDTS 21 CLK 22 REF
Key:
I(PU) = Input with internal pull-up resistor; X1, X2 = Crystal connections; O = Output; P = Power supply connection
2 Revision 071100 Printed 11/13/00 Integrated Circuit Systems, Inc. * 525 Race Street *San Jose* CA * 95126*(408) 295-9800tel* www.icst.com
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ICS525-01/02 OSCaRTM User Configurable Clock
ICS525-01 Output Divider and Maximum Output Frequency Table
S2 pin 5 0 0 0 0 1 1 1 1 S1 pin 4 0 0 1 1 0 0 1 1 S0 pin 3 0 1 0 1 0 1 0 1 CLK Output Divider 10 2 8 4 5 7 9 6
Max. Output Frequency (MHz) u
VDD = 5 V D VDD = 3.3V D 0-70 C -40 to +85 C 0-70 C -40 to +85 C 26 23 18 16 160 140 100 90 40 36 25 22 80 72 50 45 50 45 34 30 40 36 26 23 33.3 30 20 18 53 47 27 24
ICS525-02 Output Divider and Maximum Output Frequency Table
S2 pin 5 0 0 0 0 1 1 1 1 S1 pin 4 0 0 1 1 0 0 1 1 S0 pin 3 0 1 0 1 0 1 0 1 CLK Output Divider 6 2 8 4 5 7 1 3
Max. Output Frequency (MHz) e
VDD = 5V -40 to +85 C 67 200 50 100 80 57 250 133
VDD = 3.3V -40 to +85 C 40 120 30 60 48 34 200 80
The ICS525-02 is only offered in the industrial temperature range.
External Components / Crystal Selection
The ICS525 requires two 0.01F decoupling capacitors to be connected between VDD and GND, one on each side of the chip. They must be connected close to the ICS525 to minimize lead inductance. No external power supply filtering is required for this device. A 33 series terminating resistor can be used next to the CLK and REF pins. The approximate total on-chip capacitance for a crystal is 16pF, so a parallel resonant, fundamental mode crystal with this value of load (correlation) capacitance should be used. For example, using the ICS525-01 with crystals having a specified load capacitance greater than 16 pF, crystal capacitors may be connected from each of the pins X1 and X2 to Ground as shown in the Block Diagram on page 1. The value (in pF) of these crystal caps should be = (CL-16)*2, where CL is the crystal load capacitance in pF. These external capacitors are only required for applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either).
3 Revision 071100 Printed 11/13/00 Integrated Circuit Systems, Inc. * 525 Race Street *San Jose* CA * 95126*(408) 295-9800tel* www.icst.com
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ICS525-01/02 OSCaRTM User Configurable Clock
Determining (setting) the output frequency
The user has full control in setting the desired output frequency over the range shown in the table on page 2. To replace a standard oscillator, a user should connect the divider select input pins directly to ground (or VDD, although this is not required because of internal pull-ups) during Printed Circuit Board layout, so that the ICS525 automatically produces the correct clock when all components are soldered. It is also possible to connect the inputs to parallel I/O ports to switch frequencies. By choosing divides carefully, the number of inputs which need to be changed can be minimized. Observe the restrictions stated below on allowed values of VDW and RDW. ICS525-01 Settings Use the online ICS525 calculator at www.icst.com/products/ics525inputForm.html or alternatively, the output of the ICS525-01 can be determined by the following simple equation: (VDW+8) CLK frequency = Input frequency * 2 * (RDW+2)(OD) Where Reference Divider Word (RDW) = 1 to 127 (0 is not permitted) VCO Divider Word (VDW) = 4 to 511 (0, 1, 2, 3 are not permitted) Output Divider (OD) = values on page 3
Also, the following operating ranges should be observed: 10 MHz < Input frequency * 2 * (VDW+8) < 320 MHz at 5.0V or (RDW+2) < 200 MHz at 3.3V 200 kHz < Input Frequency (RDW+2)
[
See Table on Page 3 for full details of maximum output.
]
ICS525-02 Settings Use the online ICS525 calculator at www.icst.com/products/ics525inputForm.html or alternatively, the output of the ICS525-02 can be determined by the following simple equation: (VDW+8) CLK frequency = Input frequency * 2 * (RDW+2)(OD) Where Reference Divider Word (RDW) = 0 to 127 VCO Divider Word (VDW) = 0 to 511 Output Divider (OD) = values on page 3
Also, the following operating ranges should be observed: (VDW+8) < 400 MHz at 5.0V or 10 MHz < Input frequency * 2 * (RDW+2) < 240 MHz at 3.3V 200 kHz < Input Frequency (RDW+2)
[
See Table on Page 3 for full details of maximum output.
]
4 Revision 071100 Printed 11/13/00 Integrated Circuit Systems, Inc. * 525 Race Street *San Jose* CA * 95126*(408) 295-9800tel* www.icst.com
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ICS525-01/02 OSCaRTM User Configurable Clock
The dividers are expressed as integers, so that if a 66.66 MHz output is desired from a 14.31818 input, the Reference Divider Word (RDW) should be 59, and the VCO Divider Word (VDW) should be 276, with an Output divider (OD) of 2. In this example, R6:R0 is 0111011, V8:V0 is 100010100, and S2:S0 is 001. Since all of these inputs have pull-up resistors, it is only necessary to ground the zero pins, namely V7, V6, V5, V3, V1, V0, R6, R2, S2, and S1. To determine the best combination of VCO, reference, and output divider, use the ICS525 Calculator on our Web site: http://www.icst.com/products/ics525inputForm.html. This online form is easy to use and quickly shows you up to three options for these settings. You may also fax this page to MicroClock/ICS at 408 295 9818(fax), or contact us via our website at www.icst.com. Be sure to indicate the following: Your Name ________________ Company Name___________________ Telephone_________________ Respond by e-mail (list your e-mail address) __________________or fax number ___________________ Desired input crystal/clock (in MHz) _______________ Desired output frequency________________ VDD = 3.3V or 5V ___________ Duty Cycle: 40-60% _______ or 45-55% required________
5 Revision 071100 Printed 11/13/00 Integrated Circuit Systems, Inc. * 525 Race Street *San Jose* CA * 95126*(408) 295-9800tel* www.icst.com
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ICS525-01/02 OSCaRTM User Configurable Clock
Electrical Specifications
Parameter Conditions Minimum Typical ABSOLUTE MAXIMUM RATINGS (stresses be ond these can permanentl damage the device) v Supply Voltage, VDD Referenced to GND Inputs Referenced to GND -0.5 Clock Output Referenced to GND -0.5 Ambient Operating Temperature Commercial 0 Industrial -40 Soldering Temperature Max of 10 seconds Storage Temperature -65 DC CHARACTERISTICS (VDD = 3.3 V unless otherwise noted) h Operating Voltage, VDD 3 Input High Voltage, VIH 2 Input Low Voltage, VIL Input High Voltage, VIH, X1/ICLK only ICLK (Pin 7) (VDD/2)+1 VDD/2 Input Low Voltage, VIL, X1/ICLK only ICLK (Pin 7) VDD/2 Output High Voltage, VOH IOH = -12 mA VDD-0.4 Output Low Voltage, VOL IOL=12 mA IDD Operating Supply Current, 15 MHz crystal 60MHz out, No Load 8 IDD Operating Supply Current, Power Down Pin 19=0 7 Short Circuit Current CLK and REF outputs 55 On-Chip Pull-up Resistor All V, R, S pins and pin 19 270 Input Capacitance All V, R, S pins and pin 19 4 Maximum 7 VDD+0.5 VDD+0.5 70 85 260 150 5.5 0.8 (VDD/2)-1 0.4 Units V V V C C C C V V V V V V V mA A mA k pF
6 Revision 071100 Printed 11/13/00 Integrated Circuit Systems, Inc. * 525 Race Street *San Jose* CA * 95126*(408) 295-9800tel* www.icst.com
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ICS525-01/02 OSCaRTM User Configurable Clock
Electrical Specifications (cont.)
Parameter Conditions AC CHARACTERISTICS (VDD = 3.3 V unless otherwise noted) h Input Frequency, crystal input Input Frequency, clock input Output Frequency, VDD = 4.5 to 5.5V 0 C to 70 C ICS525-01, note 1 -40 C to +85 C Output Frequency, VDD = 3.0 to 3.6V 0 C to 70 C ICS525-01, note 1 -40 C to +85 C Output Frequency, VDD = 4.5 to 5.5V ICS525-02, note 1 -40 C to +85 C Output Frequency, VDD = 3.0 to 3.6V ICS525-02, note 1 -40 C to +85 C Output Clock Rise Time 0.8 to 2.0V Output Clock Fall Time 2.0 to 0.8V Output Clock Duty Cycle, OD = 2, 4, 6, 8, or 10 at VDD/2 Output Clock Duty Cycle, OD = 3, 5, 7, or 9 at VDD/2 Output Clock Duty Cycle, OD = 1 (-02 only) at VDD/2 Power Down Time, PD low to clocks stopped Power Up Time, PD high to clocks stable Absolute Clock Period Jitter, ICS525-01, Note 2 Deviation from mean One Sigma Clock Period Jitter, ICS525-01, Note 2 One Sigma Absolute Clock Period Jitter, ICS525-02, Note 2 Deviation from mean One Sigma Clock Period Jitter, ICS525-02, Note 2 One Sigma Minimum 5 0.5 1 1 1 1 1.5 1 1 1 49 to 51 Typical Maximum 27 50 160 140 100 90 250 200 Units MHz MHz MHz MHz MHz MHz ns ns % % ns ms ps ps ps ps
45 40 35
55 60 65 50 10
140 45 85 30
Note 1: The phase relationship between input and output can change at power up. For a fixed phase relationship see the ICS527. Note 2: For 16 MHz input, 100 MHz output. Use the -02 for lowest jitter.
7 Revision 071100 Printed 11/13/00 Integrated Circuit Systems, Inc. * 525 Race Street *San Jose* CA * 95126*(408) 295-9800tel* www.icst.com
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ICS525-01/02 OSCaRTM User Configurable Clock
Package Outline and Package Dimensions (For current dimensional specifications, see JEDEC Publication No. 95.)
28 pin SSOP
Symbol A A1 b c D e E E1 L Inches e Min Max 0.053 0.069 0.004 0.010 0.008 0.012 0.007 0.010 0.337 0.344 .025 BSC S 0.228 0.244 0.150 0.157 0.016 0.050 Millimeters m Min Max 1.35 1.75 0.10 0.25 0.20 0.30 0.18 0.25 8.55 8.75 0.635 BSC 5.80 6.20 3.80 4.00 0.40 1.27
E1
E
INDEX AREA
1
2
D A1 e b c A L
Ordering Information
Part/Order Number ICS525-01R ICS525-01RT ICS525-01RI ICS525-01RIT ICS525R-02I ICS525R-02IT Marking 525-01R 525-01R 525-01RI 525-01RI ICS525R-02I ICS525R-02I Package 28 pin narrow SSOP 28 pin SSOP on tape and reel 28 pin narrow SSOP 28 pin SSOP on tape and reel 28 pin narrow SSOP 28 pin SSOP on tape and reel Temperature 0 to 70 C 0 to 70 C -40 to +85 C -40 to +85 C -40 to +85 C -40 to +85 C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Inc. (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
OSCaR is a trademark of Integrated Circuit Systems
8 Revision 071100 Printed 11/13/00 Integrated Circuit Systems, Inc. * 525 Race Street *San Jose* CA * 95126*(408) 295-9800tel* www.icst.com
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